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intel iop321

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发表于 2003-6-14 22:18:09 | 显示全部楼层 |阅读模式
The IOP321 introduces a powerful combination of technical advancements. The 133 MHz PCI-X interface achieves up to 1GB per second throughput, a two-fold increase over 66 MHz PCI. The internal bus operates at 200 MHz and offers internal bandwidth of up to 1.6GB/second. The IOP321 also features a 200 MHz DDR SDRAM controller with ECC that supports up to 1GB of 64-bit DDR SDRAM, two times that of the previous generation. It contains a 100 MHz, 32-bit local bus that is excellent for embedded applications requiring a connection to non-PCI peripheral components such as ASICs, flash memory, or DSPs.

The IOP321 has additional features that accelerate I/O throughput. A 2-channel DMA controller facilitates increased PCI-to-memory throughput and memory-to-memory throughput. The application accelerator unit contains a hardware-based XOR capability and a 1KB queue to accelerate RAID-related parity calculations. The application accelerator speeds transfer of read and write data to the memory controller and computes data parity across local memory blocks.

The IOP321 features a small 544L PBGA (35mm) package. It also integrates 8 GPIO pins, 4 SDRAM output clocks, enhanced interrupt processing, a watchdog timer, and 2 programmable timers. This integration reduces chip count, saves board space, and simplifies designs. The IOP321 is code compatible with the IOP310 I/O processor chipset and the Intel StrongARM* microprocessor (SA-110), simplifying code porting from existing designs. It is compliant with the ARM* Version 5TE instruction set (excluding the floating point instruction set).

As system demands rapidly increase, greater I/O throughput becomes a necessity. The Intel I/O processor family, beginning with the Intel® i960® Rx I/O processors and continuing with the Intel IOP310 and IOP321, aids the developer in accomplishing a significant increase in overall system performance. The IOP321 I/O processor with Intel XScale microarchitecture provides a highly integrated, cost-effective I/O system on a chip that greatly improves I/O performance on current and new server platforms based on the Intel® Pentium 4®, Intel® Xeon®, and Intel® Itanium® processors.
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